target_reset_detector waivers

Author: mszalkowski-ant

verification/waivers/exclusion.yaml

@@ -4995,6 +4995,15 @@ exclusions:
           - ctrl_scl_i
 
 
+  target_reset_detector:
+    source_path: src/ctrl/target_reset_detector.sv
+    all:
+      There is no logic for checking START/STOP hold timing in RTL and bus.start_det and bus.stop_det do not depend on it:
+        cond:
+          - 10: [2 "01"] # bus.scl.stable_low | bus.sda.pos_edge
+          - 12: [2 "01"] # bus.scl.stable_low | bus.sda.neg_edge
+
+
   i3c_test_wrapper:
     source_path: verification/cocotb/top/lib_i3c_top/i3c_test_wrapper.sv
     source_sha: 47c7218fc1646b2ec5e9108ac8691aaca0157a89e39199cf1776b8d406a44795