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mtdudekmtdudek
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Move axi_sub* to i3c_axi_sub*
This commit renames 'axi_sub*' files to 'i3c_axi_sub*' to keep module name and file name the same. Signed-off-by: Maciej Dudek <mdudek@antmicro.com>
1 parent aeafbf2 commit d79d2e2

9 files changed

Lines changed: 20 additions & 20 deletions

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‎src/i3c.f‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -32,10 +32,10 @@
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${I3C_ROOT_DIR}/src/phy/i3c_io.sv
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${I3C_ROOT_DIR}/src/csr/I3CCSR.sv
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${I3C_ROOT_DIR}/src/interrupt.sv
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${I3C_ROOT_DIR}/src/libs/axi_sub/axi_sub_arb.sv
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${I3C_ROOT_DIR}/src/libs/axi_sub/axi_sub_rd.sv
37-
${I3C_ROOT_DIR}/src/libs/axi_sub/axi_sub.sv
38-
${I3C_ROOT_DIR}/src/libs/axi_sub/axi_sub_wr.sv
35+
${I3C_ROOT_DIR}/src/libs/axi_sub/i3c_axi_sub_arb.sv
36+
${I3C_ROOT_DIR}/src/libs/axi_sub/i3c_axi_sub_rd.sv
37+
${I3C_ROOT_DIR}/src/libs/axi_sub/i3c_axi_sub.sv
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${I3C_ROOT_DIR}/src/libs/axi_sub/i3c_axi_sub_wr.sv
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${I3C_ROOT_DIR}/src/hci/queues/read_queue.sv
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${I3C_ROOT_DIR}/src/hci/queues/write_queue.sv
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${I3C_ROOT_DIR}/src/hci/ahb_if.sv

src/libs/axi_sub/axi_sub.sv renamed to src/libs/axi_sub/i3c_axi_sub.sv

File renamed without changes.

src/libs/axi_sub/axi_sub_arb.sv renamed to src/libs/axi_sub/i3c_axi_sub_arb.sv

File renamed without changes.

src/libs/axi_sub/axi_sub_rd.sv renamed to src/libs/axi_sub/i3c_axi_sub_rd.sv

File renamed without changes.

src/libs/axi_sub/axi_sub_wr.sv renamed to src/libs/axi_sub/i3c_axi_sub_wr.sv

File renamed without changes.

‎verification/cocotb/block/axi_adapter/Makefile‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -24,10 +24,10 @@ VERILOG_SOURCES = \
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$(CALIPTRA_ROOT)/src/axi/rtl/axi_if.sv \
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$(CALIPTRA_ROOT)/src/axi/rtl/axi_addr.v \
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$(CALIPTRA_ROOT)/src/libs/rtl/skidbuffer.v \
27-
$(SRC_DIR)/libs/axi_sub/axi_sub_wr.sv \
28-
$(SRC_DIR)/libs/axi_sub/axi_sub_arb.sv \
29-
$(SRC_DIR)/libs/axi_sub/axi_sub_rd.sv \
30-
$(SRC_DIR)/libs/axi_sub/axi_sub.sv \
27+
$(SRC_DIR)/libs/axi_sub/i3c_axi_sub_wr.sv \
28+
$(SRC_DIR)/libs/axi_sub/i3c_axi_sub_arb.sv \
29+
$(SRC_DIR)/libs/axi_sub/i3c_axi_sub_rd.sv \
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$(SRC_DIR)/libs/axi_sub/i3c_axi_sub.sv \
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$(SRC_DIR)/csr/I3CCSR_pkg.sv \
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$(SRC_DIR)/csr/I3CCSR.sv \
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$(SRC_DIR)/hci/axi_adapter.sv \

‎verification/cocotb/block/hci_queues_axi/Makefile‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -26,10 +26,10 @@ VERILOG_SOURCES += \
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$(CALIPTRA_ROOT)/src/axi/rtl/axi_if.sv \
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$(CALIPTRA_ROOT)/src/axi/rtl/axi_addr.v \
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$(CALIPTRA_ROOT)/src/libs/rtl/skidbuffer.v \
29-
$(SRC_DIR)/libs/axi_sub/axi_sub_arb.sv \
30-
$(SRC_DIR)/libs/axi_sub/axi_sub_rd.sv \
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$(SRC_DIR)/libs/axi_sub/axi_sub.sv \
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$(SRC_DIR)/libs/axi_sub/axi_sub_wr.sv \
29+
$(SRC_DIR)/libs/axi_sub/i3c_axi_sub_arb.sv \
30+
$(SRC_DIR)/libs/axi_sub/i3c_axi_sub_rd.sv \
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$(SRC_DIR)/libs/axi_sub/i3c_axi_sub.sv \
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$(SRC_DIR)/libs/axi_sub/i3c_axi_sub_wr.sv \
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$(SRC_DIR)/hci/axi_adapter.sv \
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$(SRC_DIR)/hci/dxt.sv \
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$(SRC_DIR)/hci/queues/write_queue.sv \

‎verification/cocotb/block/i2c/Makefile‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -21,10 +21,10 @@ VERILOG_SOURCES = \
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$(CALIPTRA_ROOT)/src/libs/rtl/ahb_defines_pkg.sv \
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$(SRC_DIR)/libs/axi/axi_pkg.sv \
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$(SRC_DIR)/libs/axi/axi_if.sv \
24-
$(SRC_DIR)/libs/axi_sub/axi_sub_arb.sv \
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$(SRC_DIR)/libs/axi_sub/axi_sub_rd.sv \
26-
$(SRC_DIR)/libs/axi_sub/axi_sub.sv \
27-
$(SRC_DIR)/libs/axi_sub/axi_sub_wr.sv \
24+
$(SRC_DIR)/libs/axi_sub/i3c_axi_sub_arb.sv \
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$(SRC_DIR)/libs/axi_sub/i3c_axi_sub_rd.sv \
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$(SRC_DIR)/libs/axi_sub/i3c_axi_sub.sv \
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$(SRC_DIR)/libs/axi_sub/i3c_axi_sub_wr.sv \
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$(SRC_DIR)/libs/mem/prim_ram_1p_pkg.sv \
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$(SRC_DIR)/libs/mem/prim_generic_ram_1p.sv \
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$(SRC_DIR)/libs/mem/prim_ram_1p_adv.sv \

‎verification/cocotb/block/i2c_standby_controller/Makefile‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -21,10 +21,10 @@ VERILOG_SOURCES = \
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$(CALIPTRA_ROOT)/src/libs/rtl/ahb_defines_pkg.sv \
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$(SRC_DIR)/libs/axi/axi_pkg.sv \
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$(SRC_DIR)/libs/axi/axi_if.sv \
24-
$(SRC_DIR)/libs/axi_sub/axi_sub_arb.sv \
25-
$(SRC_DIR)/libs/axi_sub/axi_sub_rd.sv \
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$(SRC_DIR)/libs/axi_sub/axi_sub.sv \
27-
$(SRC_DIR)/libs/axi_sub/axi_sub_wr.sv \
24+
$(SRC_DIR)/libs/axi_sub/i3c_axi_sub_arb.sv \
25+
$(SRC_DIR)/libs/axi_sub/i3c_axi_sub_rd.sv \
26+
$(SRC_DIR)/libs/axi_sub/i3c_axi_sub.sv \
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$(SRC_DIR)/libs/axi_sub/i3c_axi_sub_wr.sv \
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$(SRC_DIR)/libs/mem/prim_ram_1p_pkg.sv \
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$(SRC_DIR)/libs/mem/prim_generic_ram_1p.sv \
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$(SRC_DIR)/libs/mem/prim_ram_1p_adv.sv \

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