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[NFC] Update Shader Flags section of DXIL.rst (#7295)
Fixes#7294
This PR updates DXIL.rst to list and describe all current shader flags
in DXC (from `DxilShaderFlags.h`).
Also adds extra columns to the table of shader flags to document the
minimum shader model version and the conditions or criteria under which
each shader flag is set (as seen in `DxilShaderFlags.cpp` and
`DxilModule.cpp`).
---------
Co-authored-by: Tex Riddell <texr@microsoft.com>
Copy file name to clipboardExpand all lines: docs/DXIL.rst
+46-27Lines changed: 46 additions & 27 deletions
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@@ -515,33 +515,52 @@ Additional shader properties are specified via tag-value pair list, which is the
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Shader Flags
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------------
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Shaders have additional flags that covey their capabilities via tag-value pair with tag kDxilShaderFlagsTag (0), followed by an i64 bitmask integer. The bits have the following meaning:
Shaders have additional flags that convey their capabilities via a tag-value pair with tag kDxilShaderFlagsTag (0), followed by an i64 bitmask integer. The bits have the following meaning, Shader Model requirements, and criteria for being set:
0 Disable shader optimizations Command-line flag ``/Od`` is provided to DXC
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1 Disable math refactoring Only used in Dxilconv; corresponds to ``~D3D10_SB_GLOBAL_FLAG_REFACTORING_ALLOWED`` in DXBC
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2 Double-precision floating point Use of the double data type
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3 Force early depth-stencil test Shader is a pixel shader, and the ``[earlydepthstencil]`` attribute is present in the HLSL source
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4 Raw and Structured buffers Use of RawBuffer or StructuredBuffer resource types
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5 Low-precision data types present Use of half or i16 data types
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6 Double-precision extensions for 11.1 Use of FDiv, UIToFP, SIToFP, FPToUI, FPToSI, or Fma instructions with a double type
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7 Shader extensions for 11.1 Use of the Msad instruction
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8 All resources bound for the duration of shader execution Command-line flag ``/all_resources_bound`` provided to DXC
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9 SV_RenderTargetArrayIndex or SV_ViewportArrayIndex from any shader feeding rasterizer ViewPortArrayIndex or RenderTargetArrayIndex semantics are present in the input signature of a geometry shader, or the output signature of a vertex, domain, or hull shader
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10 PS Inner Coverage Use of the InnerCoverage instruction, or the InnerCoverage semantic is present in the output signature of a pixel shader
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11 PS Output Stencil Ref The StencilRef semantic is present in the output signature of a pixel shader
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12 Tiled resources Use of the CheckAccessFullyMapped instruction, or the use of LodClamp in any of the instructions: SampleGrad, SampleCmpGrad, Sample, SampleBias, SampleCmp, or SampleCmpBias
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13 Typed UAV load additional formats Use of TextureLoad or BufferLoad on a UAV with a multi-component data type.
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14 Comparison filtering for feature level 9 Not set; unused legacy feature requirement flag
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15 64 UAV slots More than 8 UAVs are declared, enabling the extended (64-slot) UAV register space. Each UAV array (range) contributes its range size to the count
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16 UAVs at every shader stage This is set when a vertex, hull, domain, or geometry shader declares one or more UAVs
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17 CS4 raw and structured buffers Use of RawBuffer or StructuedBuffer in a Shader Model 4.x compute shader
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18 Raster Ordered UAVs Global presence of a rasterizer ordered view (ROV)
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19 Wave level operations Use of any wave or quad intrinsic: WaveIsFirstLane, WaveGetLaneIndex, WaveGetLaneCount, WaveAnyTrue, WaveAllTrue, WaveActiveAllEqual, WaveActiveBallot, WaveReadLaneAt, WaveReadLaneFirst, WaveActiveOp, WaveActiveBit, WavePrefixOp, QuadReadLaneAt, QuadOp, WaveAllBitCount, WavePrefixBitCount, WaveMatch, WaveMultiPrefixOp, WaveMultiPrefixBitCount, QuadVote
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20 64-Bit integers Use of i64 data types
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21 6.1+ View Instancing Use of the ViewID instruction
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22 6.1+ Barycentrics Use of the AttributeAtVertex instruction, or the Barcentrics semantic is present in the shader input signature
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23 6.2+ Enable native low-precision data types Command-line flag ``-enable-16bit-types`` is provided to DXC
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24 6.4+ ShadingRate The ShadingRate semantic is present in the shader input or output signature
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25 6.5+ Raytracing tier 1.1 features Use of the AllocateRayQuery, AllocateRayQuery2, or GeometryIndex instruction
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26 6.5+ Sampler feedback Use of any sampler feedback instructions: WriteSamplerFeedback, WriteSamplerFeedbackBias, WriteSamplerFeedbackLevel, and WriteSamplerFeedbackGrad
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27 6.6+ 64-bit Atomics on Typed Resources Use of i64 AtomicBinOp or AtomicCompareExchange instructions on a typed resource
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28 6.6+ 64-bit Atomics on Group Shared Use of i64 AtomicBinOp or AtomicCompareExchange instructions on group shared memory
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29 6.6+ Derivatives in mesh and amplification shaders Use of instructions DerivFineX, DerivFineY, DerivCoarseX, DerivCoarseY, CalculateLOD, Sample, SampleBias, SampleCmp, or SampleCmpBias in a mesh or amplification shader
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30 6.6+ Resource descriptor heap indexing Use of the CreateHandleFromHeap instruction on a resource descriptor heap
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31 6.6+ Sampler descriptor heap indexing Use of the CreateHandleFromHeap instruction on a sampler descriptor heap
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32 6.6+ 64-bit Atomics on Heap Resources Use of i64 AtomicBinOp or AtomicCompareExchange instructions on a descriptor heap resource
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33 6.7+ Any UAV may not alias any other UAV Use of a UAV in any function, unless the ``-res-may-alias`` command-line flag is provided to DXC
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34 6.7+ Advanced Texture Ops Use of SampleCmpLevel or TextureGatherRaw instructions, or the use of TextureLoad, SampleLevel, SampleCmpLevelZero, Sample Grad, SampleCmpGrad, Sample, SampleBias, SampleCamp, or SampleCmpBias with non-constant offsets
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35 6.7+ Writeable MSAA Textures Set by use of the TextureStoreSample instruction or the presence of writeable MSAA texture resources accessed via a CreateHandle, CreateHandleForLib, or AnnotateHandle instruction
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36 6.9+ Reserved Unused
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37 6.8+ SampleCmp with gradient or bias Use of the instructions SampleCmpGrad or SampleCmpBias
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38 6.8+ Extended command info Use of the instructions StartVertexLocation or StartInstanceLocation
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